1. Field of the Invention
This invention relates to integrated circuit packaging and, more particularly, to a memory subsystem encapsulated in a molded resin, where the subsystem comprises integrated circuits that are interconnected and stacked, preferably, upon a first portion (i.e., paddle) of a lead frame. The second portion (i.e., conductors) of the lead frame extend toward the first portion and receive bonding wires that are coupled to respective bonding pads on the stacked integrated circuits. As such, the second portion of the memory subsystem may form edge connectors configured as substantially planar pads extending along an outer surface of the encapsulated subsystem. The exposed surface of the edge connectors may frictionally contact an outer surface of corresponding pads arranged within a receptor of an electronic system, such that the receptor may thereby receive the memory subsystem.
2. Description of the Related Art
The following descriptions and examples are not admitted to be prior art by virtue of their inclusion within this section.
An electronic system is typically known as any device that may receive, transmit, and process electronic signals. Examples of popular electronic systems may include the personal computer, personal digital assistant (PDA), digital camera, or any other electronic-based appliance used in a consumer setting. A commonality among all electronic systems may be that they employ an interconnection of one or more circuits. Depending on the amount of integration, the circuits may be formed on a single monolithic substrate, often a silicon substrate, henceforth referred to as an integrated circuit.
Typical electronic systems may include one or more integrated circuits connected to each other by conductors. Thus, circuits within one integrated circuit may communicate with circuits within another integrated circuit. In order to protect the functionality of the circuits, each integrated circuit may be placed in a package to seal the integrated circuit from the environment. In addition to protecting an integrated circuit, a package may also help to distribute signals sent to and from the integrated circuit and, depending on the materials used, the package may also help dissipate heat that occurs during operation of the integrated circuit.
There may be numerous types of integrated circuit packages, though typically packages may be categorized as either ceramic packages or plastic packages. Ceramic packages may surround the encased integrated circuit with air, while plastic packages generally employ a resin that may fill the space between the integrated circuit and the surrounding package. Plastic packages may be less expensive than ceramic packages. Regardless of whether a package may be ceramic or plastic, there may be numerous package configurations and lead arrangements extending from the package. The package leads may serve to communicate signals between an integrated circuit and, thus, may be electrically connected to corresponding bonding pads on the integrated circuit in one of possibly three ways: wire bonding, Tape-Automated Bonding (TAB), or flip-chip attachment. Each arrangement is relatively well known and may be used in different applications based on cost constraints and the density of the integrated circuit bonding pads.
After a package may be formed around the integrated circuit, the matter of connecting one packaged integrated circuit to another packaged integrated circuit generally involves a printed circuit board or “card.” A card is a rigid, substantially planar backbone element that employs one or more layers of trace conductors separated by a dielectric layer. The trace conductors may extend along one or more of layers of the card, and may connect leads of one integrated circuit to leads of another integrated circuit through vias. The printed circuit board may have plated-through holes (or vias) to accommodate downward extending leads of a packaged integrated circuit, or may simply have a square or rectangular pad on which planar surfaces of the packaged integrated circuit leads may be surface-mounted. The card may serve not only to interconnect signals between integrated circuits, but may also provide mechanical support for multiple integrated circuits arranged within a chassis of an electronic system. The card may thereby suffice to arrange the bonded integrated circuits a spaced distance from each other within the confines of the chassis.
In addition, numerous ways may exist in which to configure a card and the integrated circuits bonded to that card. For example, FIG. 1 illustrates a memory card 10 with edge connectors 12. Edge connectors 12 may be arranged on the backside surface of card 10 near a forward-leading edge 14 of card 10. According to such an example, edge 14 may be inserted through slot 16 extending through chassis 18 of an electronic system 20.
Therefore, memory card 10 may be inserted into receptor 22, which may be electrically connected to, for example, another card 24. Like card 10, card 24 may also contain printed conductors and one or more integrated circuits 26 interconnected with each other on a surface of card 24. However, in contrast to card 24, card 10 may include a specific purpose that may be universally applied to an electronic system, and may be obtainable from numerous vendors in the memory technology sector. Thus, card 10 may be a memory card, and may utilize edge connectors 12 that may frictionally engage conductive elements 28 arranged within receptor 22. In this manner, edge connectors 12 may be designed to releasably insert into receptor 22.
Card 10 is illustrated in partial breakaway in FIG. 2. Card 10 may have one or more interconnected integrated circuits 30 which may also be connected to edge conductors 12 by trace conductors 32. A memory card preferably uses a form of memory array. A popular memory array may involve an array of non-volatile storage elements. The non-volatile storage elements may be configured on a single monolithic silicon substrate to form a non-volatile memory integrated circuit 30b. Along with circuit 30b may be memory controller 30a. In addition to integrated circuits 30, card 10 may also have mounted thereon discrete devices, such as decoupling or de-bounce capacitors 34. Capacitors 34 may serve to minimize transient noise applied to trace conductors 32.
In addition to the printed circuit board (or card) on which memory 30b, memory controller 30a, and capacitors 34 may be secured, card 10 may also include covering 36. Covering 36 may surround and protect the integrated circuits and capacitors mounted on card 10. Furthermore, tab or switch 38 may be formed as part of covering 36, such that when moved, switch 38 may prevent a write operation to the memory integrated circuit. Switch 38 thereby suffices to “write protect” memory card 10. If switch 38 is activated, any signal sent to edge conductors 12 to be written onto the storage elements of memory 30b may be prevented from being stored. Activation may occur simply by moving switch 38 from one position to another along the sidewall surface of card 10.
The memory card 10 shown in the configuration of FIGS. 1 and 2 gained popularity, for example, during the advent of flash memory. Flash memory may be easily erased and reprogrammed. Once reprogrammed, the data within the flash memory is said to be non-volatile and may remain until erased or again reprogrammed. Thus, card 10 may be erased and reprogrammed while in receptor 22 provided, of course, that switch 38 is not in the write protect position. Once programmed, any data stored within non-volatile memory 30b of card 10 may remain, thereby allowing card 10 to be removed and reinserted at a later time whenever that data may be needed—similar to a floppy disk.
At present there are numerous types of memory cards having the aforesaid characteristics. Popular such memory cards include: Sony's memory stick, compact flash, smart media, PC cards, flash path, multimedia cards and secure digital. All of the well-known memory cards typically include both a memory controller and non-volatile memory mounted on the card itself, or the controller may form a part of the memory interface, all of which may be interconnected to the edge connectors. As such, memory modules that include two or more die, such as a controller die and storage element, may also be called multi-chip modules (MCM).
The most common type of MCM may be the side-by-side MCM, which may mount two integrated circuits (or two die) next to each other on the top surface of a package substrate. Interconnections between integrated circuits and conductive traces on the substrate may typically be achieved by wire bonding. However, the side-by-side MCM may suffer from low package efficiency since the area of the package substrate generally increases with an increase in the number of integrated circuits mounted on the package substrate. Such an increase in package size may also increase the overall cost of the package.
Thus, a multi-chip module (MCM) may be created in which one or more die, for example, memory controller and memory array chip, may be stacked upon a package substrate to increase package efficiency. U.S. Pat. No. 6,252,305 to Lin et al. describes such a multi-chip module having a stacked chip arrangement. FIG. 3 discloses a multi-chip module 31 comprising four chips 21, 23, 25, 27 stacked upon each other and mounted to a substrate 29. Thus, the MCM comprises at least two semiconductor chips, such that each chip has a row of bonding pads formed on the active surface of the chip. However, the row of bonding pads may be disposed along only one side edge of the chip. The semiconductor chips are mounted to a substrate in a stacking arrangement, such that an upper chip is bonded to the active surface of a lower chip in such a manner that no portion of the upper chip interferes (or covers) each bond pad of the lower chip. Such an arrangement may permit wire bonding of the stacked chips to the underlying trace conductors 33 on the surface of package substrate 29.
In stacking arrangements as described above, it appears necessary to include active bonding pads arranged on only one side of an integrated circuit. Arranged on the opposing sides of the integrated circuit may be dummy bonding pads that have bond capability, yet may not be connected to internal circuitry of the integrated circuit. As such, only one side of an integrated circuit may include active bonding pads, and the other three sides of the integrated circuit may have dummy bonding pads. The dummy bonding pads may be necessary only for mechanical and assembly reasons, and may not serve to communicate with internal circuitry of the integrated circuit. Thus, the individual chips having bonding pads disposed along only one side of the chip, as described in the above prior art, may each be wire bonded to a package substrate on opposing sides of the substrate. Therefore, mounting a multi-chip module in a substrate package may allow each chip in the stack to be wire bonded to the surface of the substrate along all four sides of the substrate. However, this bonding arrangement may not be possible in other memory packaging configurations. For example, the above bonding arrangement may not be possible in memory card configurations, since memory card edge connectors (i.e. bonding pads) may be arranged along only one side of the card.
Therefore, it may be desirable to manufacture a multi-chip memory subsystem using the conventional edge connector arrangement employed by memory cards. The desired memory subsystem may, however, avoid using a printed circuit board or card for electrical routing or as a backbone for mechanical stability. The desired memory subsystem may be classified as a memory module made of less expensive materials and in less time than conventional memory cards. The desired memory subsystem may avoid the most expensive component of a memory card by eliminating the cost and lead time needed to form package material about an integrated circuit, form printed conductors upon and within a card, and form the connection between leads of the integrated circuit and printed conductors upon (or within) the card. In addition, the desired memory subsystem may integrate a memory and controller die in such a manner as to reduce the overall cost of the memory subsystem.